Innovation Today,
Legacy Tomorrow.

You will own the critical path of our trading infrastructure — designing, profiling and optimising systems where microseconds translate directly into edge. This is not a back-office role; your code runs live in production markets every day.

• Design and implement ultra-low-latency C++ components for order management, market data processing and execution engines
• Profile and optimise critical paths using hardware performance counters, cache analysis and branch-prediction tuning
• Develop and maintain kernel-bypass networking solutions (DPDK, Solarflare OpenOnload, RDMA)
• Collaborate with FPGA engineers to define the hardware/software interface for strategy offloading
• Evaluate and integrate new hardware to extend our latency advantage at co-located exchanges

• 5+ years of C++ experience in performance-critical environments (HFT, trading systems, OS or networking)
• Deep expertise in modern C++ (C++17/20): lock-free data structures, memory models, SIMD intrinsics
• Strong understanding of CPU micro-architecture: cache hierarchy, branch prediction, NUMA topology
• Experience with kernel-bypass or userspace networking (DPDK, AF_XDP or similar)
• Proven ability to profile and tune code with tools such as perf, VTune or Cachegrind

• State-of-the-art co-located infrastructure and direct access to exchange feeds
• Small, elite team — no bureaucracy, maximum ownership
• 30 days holiday and gym membership
• Full relocation support including visa sponsorship for exceptional candidates

You will generate, test and industrialise systematic alpha signals across global equities and FX markets. You will work at the intersection of applied mathematics, statistical modelling and market microstructure, operating in a fast feedback loop with our trading and engineering teams. Research is conducted with full production data and live testing capabilities from day one.

• Research and develop short-horizon alpha signals in equities and FX, from ideation through backtesting to live deployment
• Build rigorous statistical frameworks to distinguish genuine edge from overfitting and data artefacts
• Analyse market microstructure: order-book dynamics, adverse selection, liquidity regimes and intraday seasonality
• Partner with execution researchers to convert signals into executable strategies that survive transaction costs
• Maintain and improve research infrastructure: data pipelines, backtesting harnesses and performance analytics

• PhD or MSc in Mathematics, Statistics, Physics, Computer Science or a quantitative discipline
• Strong command of Python and/or R for data analysis, with experience handling tick-level or order-book data
• Expertise in statistical inference, time-series econometrics and machine learning applied to financial data
• Deep understanding of equity or FX market microstructure and the mechanics of HFT execution
• Experience building and evaluating backtests with appropriate controls for look-ahead bias

• Direct access to full exchange order-book and tick data across all traded markets from day one
• Rapid research-to-production pipeline — ideas can go live in weeks, not quarters
• 30 days holiday and gym membership
• Full relocation package and visa sponsorship where required

You will own the full development lifecycle of our hardware-accelerated trading logic — from RTL design and simulation through floorplanning, timing closure and live deployment in co-located data centres. Your work directly determines the latency floor of our trading operation.

• Design and implement RTL (VHDL/Verilog/SystemVerilog) for market data parsing, order entry and risk-check logic
• Achieve and maintain aggressive timing targets on Xilinx UltraScale+ and/or Intel Stratix/Agilex devices
• Implement low-latency network interfaces: 10/25/100 GbE MAC, UDP/IP stack and direct exchange protocol encoding
• Profile on-FPGA latency and drive incremental improvements using chipscope, ILA and external instrumentation
• Collaborate with the C++ team to define PCIe DMA interfaces and shared memory architectures

• 5+ years of hands-on FPGA development in a performance-critical environment (HFT, defence, telecom or aerospace)
• Expert-level RTL design skills in VHDL, Verilog or SystemVerilog
• Proven experience closing timing on large, complex designs with demanding clock constraints
• Strong understanding of FPGA architecture: CLB, DSP, BRAM, transceivers and PCIe hard blocks
• Experience implementing Ethernet networking stacks at the register-transfer level

• End-to-end ownership of hardware design decisions — no outsourcing, no compromise on quality
• Access to cutting-edge co-location facilities with direct dark-fibre exchange connectivity
• 30 days holiday and gym membership
• Relocation assistance and visa sponsorship available for exceptional candidates

You will take ownership of strategy P&L, monitor execution quality in real time, respond to changing market regimes and work hand-in-hand with researchers and engineers to improve edge continuously. This is a role for someone equally comfortable interpreting alpha signals and reading an order book.

• Monitor and manage a portfolio of live algorithmic strategies across equities and FX spot markets
• Analyse intraday P&L attribution, slippage and fill quality to identify execution inefficiencies
• Respond to market regime changes and risk events with appropriate parameter adjustments or strategy suspension
• Collaborate with the research team to evaluate new signals and translate them into deployable strategies
• Manage exchange connectivity relationships and stay current on venue rules, fee schedules and regulatory changes

• 3+ years of experience in an algorithmic trading or quantitative execution role at a HFT firm, market maker or tier-1 bank
• Strong quantitative background: statistical thinking, signal evaluation and transaction cost analysis
• Solid Python skills for rapid analysis of trade logs, market data and strategy performance
• Deep knowledge of equity and/or FX market microstructure: venue fragmentation, order types and fixing mechanisms
• Ability to make rapid, evidence-based decisions under pressure in live market conditions

• Direct responsibility from day one with full visibility into strategy performance and risk parameters
• Collaborative environment with quantitative researchers and engineers working in the same open office
• 30 days holiday and gym membership
• Access to proprietary data, research tools and a mature analytics platform built in-house